View ISL28107FUZ_4590970.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Precision Single and Dual Low Noise Operational Amplifiers
ISL28107, ISL28207
The ISL28107 and ISL28207 are single and dual amplifiers featuring low noise, low input bias current, and low offset and temperature drift. This makes them the ideal choice for applications requiring both high DC accuracy and AC performance. The combination of precision, low noise, and small footprint provides the user with outstanding value and flexibility relative to similar competitive parts. Applications for these amplifiers include precision active filters, medical and analytical instrumentation, precision power supply controls, and industrial controls. The ISL28107 single is available in an 8 Ld SOIC package. The ISL28207 dual amplifier will be offered in an 8 Ld SOIC package. All devices are offered in standard pin configurations and operate over the extended temperature range to -40C to +125C.
ISL28107, ISL28207
Features
* Low Input Offset . . . . . . . . . . . . . . . . 75V, Max. * Input Bias Current . . . . . . . . . . . . . . . . . . . .60pA * Superb Temperature Drift - Voltage Offset . . . . . . . . . . . . . 0.65V/C, Max. - Input Current . . . . . . . . . . . . . . . 0.9pA/C, Max * Outstanding ESD performance - Human Body Model . . . . . . . . . . . . . . . . . 4.5kV - Machine Model . . . . . . . . . . . . . . . . . . . . .500V - Charged Device Model . . . . . . . . . . . . . . . 1.5kV * Very Low Voltage Noise, 10Hz . . . . . . . . 14nV/Hz * Low Current Consumption (per amp . 0.29mA, Max. * Gain-bandwidth Product . . . . . . . . . . . . . . . 1MHz * Wide Supply Range. . . . . . . . . . . . . . . 4.5V to 40V * Operating Temperature Range . . . -40C to +125C * No Phase Reversal * Pb-Free (RoHS Compliant)
Applications*(see page 21)
* * * * * * * * * Precision Instruments Medical Instrumentation Spectral Analysis Equipment Geophysical Analysis Equipment Active Filter Blocks Microphone Pre-amplifier Thermocouples and RTD Reference Buffers Data Acquisition Power Supply Control
Related Literature*(see page 21)
* See AN1508 "ISL281X7SOICEVAL1Z Evaluation Board User's Guide" * See AN1509 "ISL282X7SOICEVAL2Z Evaluation Board User's Guide"
Typical Application
C1
8.2nF
Input Noise Voltage Spectral Density
1000 INPUT NOISE VOLTAGE (nV/Hz) V+ = 19V AV = 1
V+
VIN R1
19.1k
R2
48.7k 3.3nF
OUTPUT
100
+
C2 V-
Sallen-Key Low Pass Filter (1kHz)
10 0.1
1
10
100
1k
10k
100k
FREQUENCY (Hz)
April 8, 2010 FN6631.2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2009, 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL28107, ISL28207
Ordering Information
PART NUMBER (Notes 2, 3) ISL28107FBZ ISL28107FBZ-T7 (Note 1) ISL28107FBZ-T13 (Note 1) ISL28107FUZ ISL28107FUZ-T13 (Note 1) ISL28207FBZ ISL28207FBZ-T7 (Note 1) ISL28207FBZ-13 (Note 1) ISL28107SOICEVAL1Z ISL28207SOICEVAL2Z NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28107 and ISL28207. For more information on MSL please see techbrief TB363. PART MARKING 28107 FBZ 28107 FBZ 28107 FBZ 8107Z 8107Z 28207 FBZ 28207 FBZ 28207 FBZ Evaluation Board Evaluation Board TEMP. RANGE (C) -40 to +125 -40 to +125 -40 to +125 -40 to +125 -40 to +125 -40 to +125 -40 to +125 -40 to +125 PACKAGE (Pb-Free) 8 Ld SOIC 8 Ld SOIC 8 Ld SOIC 8 Ld MSOP 8 Ld MSOP 8 Ld SOIC 8 Ld SOIC 8 Ld SOIC PKG. DWG. # M8.15E M8.15E M8.15E M8.118 M8.118 M8.15E M8.15E M8.15E
Pin Configurations
ISL28107 (8 LD SOIC, MSOP) TOP VIEW
NC -IN_A +IN_A V1 2 3 4 -+ 8 7 6 5 NC V+ VOUTA NC VOUTA -IN_A +IN_A V1 2 3 4 -+ +-
ISL28207 (8 LD SOIC) TOP VIEW
8 7 6 5 V+ VOUTB -IN_B +IN_B
Pin Descriptions
ISL28107 (8 LD SOIC, MSOP) 3 4 ISL28207 (8 LD SOIC) 3 4 5 6 7 7 6 2 1, 5, 8
V+ IN500 500 IN+
PIN NAME +IN_A V+IN_B -IN_B VOUTB V+ VOUTA -IN_A NC
EQUIVALENT CIRCUIT Circuit 1 Circuit 3 Circuit 1 Circuit 1 Circuit 2 Circuit 3 Circuit 2 Circuit 1 V+ OUT VCIRCUIT 2
DESCRIPTION Amplifier A non-inverting input Negative power supply Amplifier B non-inverting input Amplifier B inverting input Amplifier B output Positive power supply Amplifier A output Amplifier A inverting input No internal connection
V+ CAPACITIVELY TRIGGERED
8 1 2
V-
VCIRCUIT 3
CIRCUIT 1
2
FN6631.2 April 8, 2010
ISL28107, ISL28207
Absolute Maximum Ratings
Maximum Supply Voltage . . . . . . . . . . . . . . . . . . . . . . 42V Maximum Differential Input Current . . . . . . . . . . . . . 20mA Maximum Differential Input Voltage (V-) - 0.5V to (V+) + 0.5V Min/Max Input Voltage . . . . . . . . (V-) - 0.5V to (V+) + 0.5V Max/Min Input current for input voltage >V+ or Thermal Information
Thermal Resistance (Typical, Notes 4, 5) JA (C/W) JC (C/W) 8 Ld SOIC (ISL28107) . . . . . . . . . . . 120 60 8 Ld SOIC (ISL28207) . . . . . . . . . . . 105 50 8 Ld MSOP (ISL28107) . . . . . . . . . . . 155 50 Storage Temperature Range . . . . . . . . . . . -65C to +150C Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Ambient Operating Temperature Range. . . . -40C to +125C Maximum Operating Junction Temperature . . . . . . . +150C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
NOTES: 4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 5. For JC, the "case temp" location is taken at the package top center.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications VS 15V, VCM = 0, VO = 0V, RL = Open, TA= +25C, unless otherwise noted. Boldface limits
apply over the operating temperature range, -40C to +125C. Temperature data established by characterization. CONDITIONS TA = -40C to +85C TA = -40C to +125C TA = -40C to +85C TA = -40C to +125C MIN (Note 6) -75 -140 -100 -180 -0.65 -0.85 TA = -40C to +85C TA = -40C to +125C TCIB -300 -600 -0.9 -3.5 -300 -600 -0.9 -3.5 -13 115 115 3,000 145 145 40,000 0.19 0.26 0.19 0.26 15 0.1 0.1 15 5 TYP 5 MAX (Note 6) 75 140 100 180 0.65 0.85 300 600 0.9 3.5 300 600 0.9 3.5 13
PARAMETER VOS
DESCRIPTION Offset Voltage Magnitude; SOIC Package Offset Voltage Magnitude; MSOP Package
UNIT V V V V V/C V/C pA pA pA/C pA/C pA pA pA/C pA/C V dB dB V/mV
TCVOS
Offset Voltage Drift; SOIC Package Offset Voltage Drift; MSOP Package
IB
Input Bias Current
Input Bias Current Drift
TA = -40C to +85C TA = -40C to +125C
IOS
Input Offset Current
TA = -40C to +85C TA = -40C to +125C
TCIOS
Input Offset Current Drift
TA = -40C to +85C TA = -40C to +125C
VCM CMRR PSRR AVOL
Input Voltage Range Common-Mode Rejection Ratio
Guaranteed by CMRR test VCM = -13V to +13V
Power Supply Rejection Ratio VS = 2.25V to 20V Open-Loop Gain VO = -13V to +13V, RL = 10k to ground
3
FN6631.2 April 8, 2010
ISL28107, ISL28207
Electrical Specifications VS 15V, VCM = 0, VO = 0V, RL = Open, TA= +25C, unless otherwise noted. Boldface limits
apply over the operating temperature range, -40C to +125C. Temperature data established by characterization. (Continued) CONDITIONS RL = 10k to ground MIN (Note 6) 13.5 13.2 RL = 2k to ground 13.3 13.1 VOL Output Voltage Low RL = 10k to ground -13.7 RL = 2k to ground -13.55 IS Supply Current/Amplifier RL = Open 0.21 -13.5 -13.2 -13.3 -13.1 0.29 0.35 ISC VSUPPLY Output Short-Circuit Current (Note 7) Supply Voltage Range Guaranteed by PSRR 2.25 40 20 13.55 TYP 13.7 MAX (Note 6)
PARAMETER VOH
DESCRIPTION Output Voltage High
UNIT V V V V V V V V mA mA mA V
AC SPECIFICATIONS GBW enp-p en en en en in THD + N Gain Bandwidth Product Voltage Noise Voltage Noise Density Voltage Noise Density Voltage Noise Density Voltage Noise Density Current Noise Density Total Harmonic Distortion + Noise 0.1Hz to 10Hz, VS = 19V f = 10Hz, VS = 19V f = 100Hz, VS = 19V f = 1kHz, VS = 19V f = 10kHz, VS = 19V f = 10kHz, VS = 19V 1kHz, G = 1, VO = 3.5VRMS, RL = 2k 1 340 14 13 13 13 53 0.0035 MHz nVP-P nV/Hz nV/Hz nV/Hz nV/Hz fA/Hz %
TRANSIENT RESPONSE SR tr, tf, Small Signal Slew Rate Rise Time 10% to 90% of VOUT Fall Time 90% to 10% of VOUT ts Settling Time to 0.1% 10V Step; 10% to VOUT Settling Time to 0.01% 10V Step; 10% to VOUT tOL Output Overload Recovery Time AV = 10, RL = 10k, VO = 10VP-P AV = 1, VOUT = 100mVP-P, Rf = 0, RL = 2k to VCM AV = 1, VOUT = 100mVP-P, Rf = 0, RL = 2k to VCM AV = -1 VOUT = 10VP-P, Rg = Rf =10k, RL = 2k to VCM AV = -1, VOUT = 10VP-P, Rg = Rf =10k, RL = 2k to VCM AV = 100, VIN = 0.2V , RL = 2k to VCM 0.32 355 365 29 31.2 6 V/s ns ns s s s
4
FN6631.2 April 8, 2010
ISL28107, ISL28207
Electrical Specifications
VS 5V, VCM = 0, VO = 0V, TA = +25C, unless otherwise noted. Boldface limits apply over the operating temperature range, -40C to +125C. Temperature data established by characterization. CONDITIONS TA = -40C to +85C TA = -40C to +125C TA = -40C to +85C TA = -40C to +125C MIN (Note 6) -75 -140 -100 -180 -0.65 -0.85 TA = -40C to +85C TA = -40C to +125C TCIB -300 -600 -0.9 -3.5 -300 -600 -0.9 -3.5 -3 115 115 3,000 3.5 3.2 RL = 2k to ground 3.3 3.1 VOL Output Voltage Low RL = 10k to ground -3.7 -3.5 -3.2 RL = 2k to ground -3.55 -3.3 -3.1 IS Supply Current/Amplifier RL = Open 0.21 0.29 0.35 ISC Output Short-Circuit Current (Note 7) 40 3.55 145 145 40,000 3.7 0.19 0.26 0.19 0.26 15 0.1 0.1 15 5 TYP 5 MAX (Note 6) 75 140 100 180 0.65 0.85 300 600 0.9 3.5 300 600 0.9 3.5 3 UNIT V V V V V/C V/C pA pA pA/C pA/C pA pA pA/C pA/C V dB dB V/mV V V V V V V V V mA mA mA
PARAMETER VOS
DESCRIPTION Offset Voltage Magnitude; SOIC Package Offset Voltage Magnitude; MSOP Package
TCVOS
Offset Voltage Drift; SOIC Package Offset Voltage Drift; MSOP Package
IB
Input Bias Current
Input Bias Current Drift
TA = -40C to +85C TA = -40C to +125C
IOS
Input Offset Current
TA = -40C to +85C TA = -40C to +125C
TCIOS
Input Offset Current Drift
TA = -40C to +85C TA = -40C to +125C
VCM CMRR PSRR AVOL VOH
Common Mode Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Open-Loop Gain Output Voltage High
Guaranteed by CMRR test VCM = -3V to +3V VS = 2.25V to 5V VO = -3V to +3V, RL = 10k to ground RL = 10k to ground
AC SPECIFICATIONS GBW THD + N Gain Bandwidth Product Total Harmonic Distortion + Noise 1kHz, G = 1, Vo = 2.5VRMS, RL = 2k 1 0.0053 MHz %
TRANSIENT RESPONSE SR Slew Rate AV = 10, RL = 2k 0.32 V/s
5
FN6631.2 April 8, 2010
ISL28107, ISL28207
Electrical Specifications
VS 5V, VCM = 0, VO = 0V, TA = +25C, unless otherwise noted. Boldface limits apply over the operating temperature range, -40C to +125C. Temperature data established by characterization. (Continued) CONDITIONS AV = 1, VOUT = 100mVP-P, Rf = 0, RL = 2k to VCM AV = 1, VOUT = 100mVP-P, Rf = 0, RL = 2k to VCM AV = -1, VOUT = 4VP-P, Rf = Rg = 2k, RL = 2k to VCM AV = -1, VOUT = 4VP-P, Rf = Rg = 2k, RL = 2k to VCM MIN (Note 6) TYP 355 370 12.4 22 MAX (Note 6) UNIT ns ns s s
PARAMETER tr, tf, Small Signal
DESCRIPTION Rise Time 10% to 90% of VOUT Fall Time 90% to 10% of VOUT
ts
Settling Time to 0.1% 4V Step; 10% to VOUT Settling Time to 0.01% 4V Step; 10% to VOUT
NOTES: 6. Parameters with MIN and/or MAX limits are 100% tested at +25C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 7. Output Short Circuit Current is the minimum current (source or sink) when the output is driven into the supply rails with RL = 0 to ground.
Typical Performance Curves
30 VS = 15V 20 10 Vos (V)
VS = 15V, VCM = 0V, RL = Open, TA = +25C unless otherwise specified.
30 VS = 5V 20 10 Vos (V) 0 -10 -20 -30 -50
0 -10 -20 -30 -50
0
50 TEMPERATURE (C)
100
150
0
50 TEMPERATURE (C)
100
150
FIGURE 1. INPUT OFFSET VOLTAGE vs TEMPERATURE, VS = 15V
FIGURE 2. INPUT OFFSET VOLTAGE vs TEMPERATURE, VS = 5V
1400 VS = 15V NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 1200 1000 800 600 400 200 0 -100 -80 -60 -40 -20 0 20 VOS (V) 40 60 80 100
1400 VS = 5V 1200 1000 800 600 400 200 0 -100 -80 -60 -40 -20 0 20 VOS (V) 40 60 80 100
FIGURE 3. INPUT OFFSET VOLTAGE DISTRIBUTION, VS = 15V
FIGURE 4. INPUT OFFSET VOLTAGE DISTRIBUTION, VS = 5V
6
FN6631.2 April 8, 2010
ISL28107, ISL28207
Typical Performance Curves
16 VS = 15V NUMBER OF AMPLIFIERS
VS = 15V, VCM = 0V, RL = Open, TA = +25C unless otherwise specified. (Continued)
16 VS = 5V NUMBER OF AMPLIFIERS 14 12 10 8 6 4 2
14 12 10 8 6 4 2 0 -0.45 -0.30 -0.15 0 0.15 TCVOS (V/C) 0.30 0.45
0 -0.45
-0.30
-0.15
0 0.15 TCVOS (V/C)
0.30
0.45
FIGURE 5. TCVOS vs NUMBER OF AMPLIFIERS, VS = 15V
FIGURE 6. TCVOS vs NUMBER OF AMPLIFIERS, VS = 5V
200 VS = 15V 100 Ib+ (pA) Ib+ (pA)
200 VS = 5V 100
0
0
-100
-100
-200 -50
-25
0
25
50
75
100
125
150
-200 -50
-25
0
TEMPERATURE (C)
25 50 75 TEMPERATURE (C)
100
125
150
FIGURE 7. POSITIVE BIAS CURRENT vs TEMPERATURE, VS = 15V
FIGURE 8. POSITIVE BIAS CURRENT vs TEMPERATURE, VS = 5V
80 VS = 15V NUMBER OF AMPLIFIERS 70 60 50 40 30 20 10 0 -1.8 -1.4 -1.0 -0.6 -0.2 0.2 TCIb+ (pA/C) 0.6 1.0 NUMBER OF AMPLIFIERS
80 70 60 50 40 30 20 10 0 -1.8 -1.4 -1.0 -0.6 -0.2 0.2 TCIb+ (pA/C) 0.6
VS = 5V
1.0
FIGURE 9. TCIb+ vs NUMBER OF AMPLIFIERS, VS = 15V
FIGURE 10. TCIb+ vs NUMBER OF AMPLIFIERS, VS = 5V
7
FN6631.2 April 8, 2010
ISL28107, ISL28207
Typical Performance Curves
200 VS = 15V 100 Ib- (pA)
VS = 15V, VCM = 0V, RL = Open, TA = +25C unless otherwise specified. (Continued)
200 Vs = 5V 100 Ib- (pA)
0
0
-100
-100
-200 -50
-25
0
25 50 75 TEMPERATURE (C)
100
125
150
-200 -50
-25
0
25 50 75 TEMPERATURE (C)
100
125
150
FIGURE 11. NEGATIVE BIAS CURRENT vs TEMPERATURE, VS = 15V
FIGURE 12. NEGATIVE BIAS CURRENT vs TEMPERATURE, VS = 5V
100 90 NUMBER OF AMPLIFIERS 80 70 60 50 40 30 20 10 0 -1.8 -1.4 -1.0 -0.6 -0.2 0.2 TCIb- (pA/C)
80 VS = 5V NUMBER OF AMPLIFIERS 70 60 50 40 30 20 10 0.6 1.0 0 -1.8 -1.4 -1.0 -0.6 -0.2 0.2 TCIb- (pA/C) 0.6
VS = 15V
1.0
FIGURE 13. TCIb- vs NUMBER OF AMPLIFIERS, VS = 5V
FIGURE 14. TCIb- vs NUMBER OF AMPLIFIERS, VS = 15V
200 VS = 15V 150 100 IOS (pA) IOS (pA) 50 0 -50 -100 -150 -200 -50 0 50 TEMPERATURE (C) 100 150
200 VS = 5V 150 100 50 0 -50 -100 -150 -200 -50 0 50 TEMPERATURE (C) 100 150
FIGURE 15. OFFSET CURRENT vs TEMPERATURE, VS = 15V
FIGURE 16. OFFSET CURRENT vs TEMPERATURE, VS = 5V
8
FN6631.2 April 8, 2010
ISL28107, ISL28207
Typical Performance Curves
50 45 NUMBER OF AMPLIFIERS 40 35 30 25 20 15 10 5 0 -0.7 -0.5 -0.3 -0.1 0.1 0.3 TCIOS (pA/C) 0.5 0.7 VS = 15V
VS = 15V, VCM = 0V, RL = Open, TA = +25C unless otherwise specified. (Continued)
50 45 NUMBER OF AMPLIFIERS 40 35 30 25 20 15 10 5 0 -0.7 -0.5 -0.3 -0.1 0.1 0.3 TCIOS (pA/C) 0.5 0.7 VS = 5V
FIGURE 17. TCIOS- vs NUMBER OF AMPLIFIERS, VS = 15V
FIGURE 18. TCIOS- vs NUMBER OF AMPLIFIERS, VS = 5V
180 Vcm = 13V
180 VS = 2.25V TO 20V 160
CMRR (dB)
PSRR (dB)
160
140
140 120
120 -50
0
50 TEMPERATURE (C)
100
150
100 -50
0
50 100 TEMPERATURE (C)
150
FIGURE 19. CMRR vs TEMPERATURE
FIGURE 20. PSRR vs TEMPERATURE
63000 VO = 13V 53000 43000 33000 23000 13000 3000 -50 VOH (V)
14.4 14.2 14.0 13.8 13.6 13.4 13.2 -50
Vs = 15V RL = 10k
AVOL (V/mV)
0
50 TEMPERATURE (C)
100
150
0
50 TEMPERATURE (C)
100
150
FIGURE 21. AVOL vs TEMPERATURE
FIGURE 22. VOH vs TEMPERATURE, VS = 15V, RL = 10k
9
FN6631.2 April 8, 2010
ISL28107, ISL28207
Typical Performance Curves
-13.2 -13.4 -13.6 VOL (V) -13.8 -14.0 -14.2 -14.4 -50 VS = 15V RL = 10k
VS = 15V, VCM = 0V, RL = Open, TA = +25C unless otherwise specified. (Continued)
14.4 14.2 14.0 VOH (V) 13.8 13.6 13.4 13.2 -50 VS = 15V RL = 2k
0
50 100 TEMPERATURE (C)
150
0
50 100 TEMPERATURE (C)
150
FIGURE 23. VOL vs TEMPERATURE, VS = 15V, RL = 10k
FIGURE 24. VOH vs TEMPERATURE, VS = 15V, RL = 2k
-13.2 -13.4 -13.6
VS = 15V RL = 2k
4.4 4.2 4.0 VOH (V) 3.8 3.6 3.4
VS = 5V RL = 10k
VOL (V)
-13.8 -14.0 -14.2 -14.4 -50
0
50 100 TEMPERATURE (C)
150
3.2 -50
0
50 TEMPERATURE (C)
100
150
FIGURE 25. VOL vs TEMPERATURE, VS = 15V, RL = 2k
FIGURE 26. VOH vs TEMPERATURE, VS = 5V, RL = 10k
-3.2 -3.4 -3.6 VOL (V)
VS = 5V RL = 10k
0.40 0.35 15V 0.30 IS (mA) 2.25V 0.25 0.20 0.15 0.10 -50
-3.8 -4.0 -4.2 -4.4 -50
0
50 TEMPERATURE (C)
100
150
0
50 TEMPERATURE (C)
100
150
FIGURE 27. VOL vs TEMPERATURE, VS = 5V, RL = 10k
FIGURE 28. SUPPLY CURRENT vs TEMPERATURE
10
FN6631.2 April 8, 2010
ISL28107, ISL28207
Typical Performance Curves
60 ISC+ @ 15V 55 50 ISC+ (mA)
VS = 15V, VCM = 0V, RL = Open, TA = +25C unless otherwise specified. (Continued)
60 ISC- @ 15V 55 50 ISC- (mA) 45 40 35 30 25
45 40 35 30 25 20 -50 0 50 TEMPERATURE (C) 100 150
20 -50
0
50 TEMPERATURE (C)
100
150
FIGURE 29. POSITIVE SHORT CIRCUIT CURRENT vs TEMPERATURE
FIGURE 30. NEGATIVE SHORT CIRCUIT CURRENT vs TEMPERATURE
200 INPUT NOISE VOLTAGE (nV) 150 100 50 0 -50 -100 -150 -200 0 1 2 3 4 5 TIME (s) 6 V+ = 19V RL = INF, CL = 4pF Rg = 10, Rf = 100k AV = 10,000 7 8 9 10
1000 INPUT NOISE VOLTAGE (nV/Hz) V+ = 19V AV = 1
100
10 0.1
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 31. INPUT NOISE VOLTAGE 0.1Hz TO 10Hz
FIGURE 32. INPUT NOISE VOLTAGE SPECTRAL DENSITY
1 INPUT NOISE CURRENT (pA/Hz)
100 80 PSRR- VS = 5V, VS = 15V 60 PSRR (dB) V+ = 19V AV = 1 1 10 100 1k 10k 100k
0.1
40 20 R = INF L CL = 4pF 0 AV = +1 VSOURCE = 1VP-P PSRR+ VS = 5V, VS = 15V -20 10 100 1k 10k 100k FREQUENCY (Hz)
0.01 0.1
1M
FREQUENCY (Hz)
FIGURE 33. INPUT NOISE CURRENT SPECTRAL DENSITY
FIGURE 34. PSRR vs FREQUENCY, VS = 5V, 15V
11
FN6631.2 April 8, 2010
ISL28107, ISL28207
Typical Performance Curves
160 140 120 CMRR (dB) 100 80 60 40 RL = INF CL = 4pF AV = +1 VCM = 1VP-P
VS = 15V, VCM = 0V, RL = Open, TA = +25C unless otherwise specified. (Continued)
60 40 +125C 20 VOS (V) 0 -20 -40C -40 +25C
20 0 0.1 1 10 100 1k
VS = 2.25V, 5V, 15V 10k 100k 1M 10M 100M -60 -15 -10 -5 0 5 10 15
FREQUENCY (Hz)
INPUT COMMON MODE VOLTAGE
FIGURE 35. CMRR vs FREQUENCY, VS = 2.25, 5V, 15V
FIGURE 36. INPUT OFFSET VOLTAGE vs INPUT COMMON MODE VOLTAGE, VS = 15V
200 180 160 140 PHASE 120 100 80 60 40 20 GAIN 0 -20 R = 10k L -40 CL = 10pF -60 SIMULATION -80 -100 0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz)
200 180 160 140 PHASE 120 100 80 60 40 20 GAIN 0 -20 R = 10k L -40 CL = 100pF -60 SIMULATION -80 -100 0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz)
OPEN LOOP GAIN (dB)/PHASE ()
FIGURE 37. OPEN-LOOP GAIN, PHASE vs FREQUENCY, RL = 10k, CL = 10pF
FIGURE 38. OPEN-LOOP GAIN, PHASE vs FREQUENCY, RL = 10k, CL = 100pF
OPEN LOOP GAIN (dB)/PHASE ()
70 60 50 40 GAIN (dB) 30 20 10 0 -10 -20 10 AV = 10 Rg = 10k, Rf = 100k AV = 1 Rg = OPEN, Rf = 0 100 1k 10k 100k 1M 10M AV = 100 AV = 1000 Rg = 100, Rf = 100k NORMALIZED GAIN (dB) Rg = 1k, Rf = 100k V+ = 20V CL = 4pF RL = 10k VOUT = 100mVP-P
8 6 4 2 0 -2 -4 V+ = 5V -6 RL = 10k CL = 4pF -8 AV = +2 -10 VOUT = 10mVP-P -12 1k 10k Rf = Rg = 100 Rf = Rg = 1k Rf = Rg = 100k Rf = Rg = 10k
100k FREQUENCY (Hz)
1M
10M
FREQUENCY (Hz)
FIGURE 39. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
FIGURE 40. FREQUENCY RESPONSE vs FEEDBACK RESISTANCE Rf/Rg
12
FN6631.2 April 8, 2010
ISL28107, ISL28207
Typical Performance Curves
1 0 NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 -9 V+ = 5V CL = 4pF AV = +1 VOUT = 10mVP-P 1k 10k 100k FREQUENCY (Hz) 1M 10M RL = 100k RL = 10k RL = 1k RL = 499
VS = 15V, VCM = 0V, RL = Open, TA = +25C unless otherwise specified. (Continued)
1 0 NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 -9 V+ = 20V CL = 4pF AV = +1 VOUT = 100mVP-P 1k 10k RL = 100k RL = 10k RL = 1k RL = 499
100k FREQUENCY (Hz)
1M
10M
FIGURE 41. GAIN vs FREQUENCY vs RL
FIGURE 42. GAIN vs FREQUENCY vs RL
8 6 NORMALIZED GAIN (dB) 4 2 0 -2 -4 -6 -8 VS = 15V RL = 10k AV = +1 VOUT = 100mVP-P 1k 10k CL = 51pF CL = 4pF NORMALIZED GAIN (dB) CL = 334pF CL = 224pF CL = 104pF
1 0 -1 -2 -3 -4 -5 -6 -7 -8 100k FREQUENCY (Hz) 1M 10M -9 1k VS = 5V CL = 4pF AV = +1 RL = INF VOUT = 10mVP-P VOUT = 50mVP-P VOUT = 100mVP-P VOUT = 200mVP-P VOUT = 500mVP-P VOUT = 1VP-P 10k 100k FREQUENCY (Hz) 1M 10M
FIGURE 43. GAIN vs FREQUENCY vs CL
FIGURE 44. GAIN vs FREQUENCY vs OUTPUT VOLTAGE
2 0 NORMALIZED GAIN (dB) -2 -4 -6 -8 -10 C = 4pF L -12 RL = 10k AV = +1 -14 VOUT = 100mVP-P -16 1k 10k VS = 20V VS = 5V VS = 15V VS = 2.25V 100k FREQUENCY (Hz) 1M 10M CROSSTALK (dB)
140 120 100 80 60 RL = 10k 40 C = 4pF L AV = +1 20 VOUT = 1VP-P 0 10 100 VS = 5V VS = 15V 1k 10k 100k FREQUENCY (Hz) 1M 10M
FIGURE 45. GAIN vs FREQUENCY vs SUPPLY VOLTAGE
FIGURE 46. CROSSTALK vs FREQUENCY, VS = 5V, 15V
13
FN6631.2 April 8, 2010
ISL28107, ISL28207
Typical Performance Curves
6 4 LARGE SIGNAL (V) 2 0 -2 -4 -6 RL = 10k RL = 2k V+ = 15V CL = 4pF AV = 11 Rf = 10k, Rg = 1k VOUT = 10VP-P
VS = 15V, VCM = 0V, RL = Open, TA = +25C unless otherwise specified. (Continued)
2.5 2.0 1.5 LARGE SIGNAL (V) 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 CL = 4pF AV = 1 VOUT = 4VP-P 0 5 10 15 20 25 30 35 VS = 5V, 15V, RL = 2k VS = 5V, 15V, RL = 10k
0
50
100
150
200 TIME (s)
250
300
350
400
-2.5
TIME (s)
FIGURE 47. LARGE SIGNAL 10V STEP RESPONSE, VS = 15V
FIGURE 48. LARGE SIGNAL TRANSIENT RESPONSE vs RL VS = 5V, 15V
0.08 0.06 SMALL SIGNAL (V) 0.04 0.02 0.00 -0.02 -0.04 -0.06 -0.08 0 5 10 RL = 2k, 10k CL = 4pF AV = 1 VOUT = 100mVP-P 15 20 25 TIME (s) 30 35 40 VS = 5V, 15V, 20V INPUT (V)
0.26 0.22 0.18 0.14 0.10 0.06 0.02 -0.02 -0.06 0 20 40 60 INPUT OUTPUT VS = 15V RL = 10k CL = 4pF AV = 100 Rf = 10k, Rg = 100 VIN = 200mVP-P
15 13 11 9 7 5 3 1 OUTPUT (V)
-1 80 100 120 140 160 180 200 TIME (s)
FIGURE 49. SMALL SIGNAL TRANSIENT RESPONSE VS = 5V, 15V, 20V
FIGURE 50. POSITIVE OUTPUT OVERLOAD RESPONSE TIME, VS = 15V
0.06 0.02 -0.02 INPUT (V) -0.06 -0.10 -0.14 -0.18 -0.22 -0.26 0 20 40
OUTPUT
1 -1 INPUT OVERSHOOT (%) -3 -5 -7 VS = 15V RL = 10k CL = 4pF AV = 100 Rf = 10k, Rg = 100 VIN = 200mVP-P -9 -11 -13 OUTPUT (V)
50 45 40 35 30 25 20 15 10 5 0 1 10 100 1,000 CAPACITANCE (pF) 10,000
O RS VE
VS = 15V RL = 10k AV = 1 VOUT = 100mVP-P
O SH ER OV
OT
+
HO
OT
-
60
-15 80 100 120 140 160 180 200 TIME (s)
FIGURE 51. NEGATIVE OUTPUT OVERLOAD RESPONSE TIME, VS = 15V
FIGURE 52. % OVERSHOOT vs LOAD CAPACITANCE, VS = 15V
14
FN6631.2 April 8, 2010
ISL28107, ISL28207
Applications Information
Functional Description
The ISL28107 and ISL28207 are single and dual, very low 1/f noise (14nV/Hz @ 10Hz) precision op-amps. These amplifiers feature very high open loop gain (50kV/mV) for excellent CMRR (145dB), and gain accuracy. Both devices are fabricated in a new precision 40V complementary bipolar DI process. The super-beta NPN input stage with bias current cancellation provides bipolar-like levels of AC performance with the low input bias currents approaching JFET levels. The temperature stabilization provided by bias current cancellation removes the high input bias current temperature coefficient commonly found in JFET amplifiers. Figures 7 and 8 show the input bias current variation over temperature. The input offset voltage (VOS) has an very low, worst case value of 75V max at +25C and a maximum TC of 0.65V/C. Figure 36 shows VOS as a function of supply voltage and temperature with the common mode voltage at 0V for split supply operation. The complimentary bipolar output stage maintains stability driving large capacitive loads (to 10nF) without external compensation. The small signal overshoot vs. load capacitance is shown in Figure 52.
Output Current Limiting
The output current is internally limited to approximately 40mA at +25C and can withstand a short circuit to either rail as long as the power dissipation limits are not exceeded. This applies to only 1 amplifier at a time for the dual op-amp. Continuous operation under these conditions may degrade long term reliability.
Output Phase Reversal
Output phase reversal is a change of polarity in the amplifier transfer function when the input voltage exceeds the supply voltage. The ISL28107 and ISL28207 are immune to output phase reversal, even when the input voltage is 1V beyond the supplies.
Using Only One Channel
The ISL28207 is a dual op-amp. If the application only requires one channel, the user must configure the unused channel to prevent it from oscillating. The unused channel will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the inverting input and ground the positive input (as shown in Figure 53).
+
Operating Voltage Range
The devices are designed to operate over the 4.5V (2.25V) to 40V (20V) range and are fully characterized at 10V (5V) and 30V (15V). Both DC and AC performance remain virtually unchanged over the complete 4.5V to 40V operating voltage range. Parameter variation with operating voltage is shown in the "Typical Performance Curves" beginning on page 6. The input common mode voltage range sensitivity to temperature is shown in Figure 36 (15V).
FIGURE 53. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
Power Dissipation
It is possible to exceed the +150C maximum junction temperatures under certain load and power supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related using Equation 1:
T JMAX = T MAX + JA xPD MAXTOTAL (EQ. 1)
Input ESD Diode Protection
The input terminals (IN+ and IN-) each have internal ESD protection diodes to the positive and negative supply rails, a series connected 500 current limiting resistor followed by an anti-parallel diode pair across the input NPN transistors (Circuit 1 in "Pin Descriptions" on page 2). The resistor-ESD diode configuration enables a wide differential input voltage range equal to the lesser of the Maximum Supply Voltage in the "Absolute Maximum Ratings" on page 3 (42V) or, a maximum of 0.5V beyond the V+ and V- supply voltage. The internal protection resistors eliminate the need for external input current limiting resistors in unity gain connections and other circuit applications where large voltages or high slew rate signals are present. Although the amplifier is fully protected, high input slew rates that exceed the amplifier slew rate (0.32V/s) may cause output distortion.
where: * PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) * PDMAX for each amplifier can be calculated using Equation 2:
V OUTMAX PD MAX = V S x I qMAX + ( V S - V OUTMAX ) x --------------------------R
L
(EQ. 2)
15
FN6631.2 April 8, 2010
ISL28107, ISL28207
where: * TMAX = Maximum ambient temperature * JA = Thermal resistance of the package * PDMAX = Maximum power dissipation of 1 amplifier * VS = Total supply voltage * IqMAX = Maximum quiescent supply current of 1 amplifier * VOUTMAX = Maximum output voltage swing of the application * RL = Load resistance
LICENSE STATEMENT
The information in this SPICE model is protected under the United States copyright laws. Intersil Corporation hereby grants users of this macro-model hereto referred to as "Licensee", a nonexclusive, nontransferable licence to use this model as long as the Licensee abides by the terms of this agreement. Before using this macro-model, the Licensee should read this license. If the Licensee does not accept these terms, permission to use the model is not granted. The Licensee may not sell, loan, rent, or license the macro-model, in whole, in part, or in modified form, to anyone outside the Licensee's company. The Licensee may modify the macro-model to suit his/her specific applications, and the Licensee may make copies of this macro-model for use within their company only. This macro-model is provided "AS IS, WHERE IS, AND WITH NO WARRANTY OF ANY KIND EITHER EXPRESSED OR IMPLIED, INCLUDING BUY NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE." In no event will Intersil be liable for special, collateral, incidental, or consequential damages in connection with or arising out of the use of this macro-model. Intersil reserves the right to make changes to the product and the macro-model without prior notice.
ISL28107, ISL28207 SPICE Model
Figure 54 shows the SPICE model schematic and Figure 55 shows the net list for the ISL28107, ISL28207 SPICE model. The model is a simplified version of the actual device and simulates important AC and DC parameters. AC parameters incorporated into the model are: 1/f and flatband noise, Slew Rate, CMRR, Gain and Phase. The DC parameters are VOS, IOS, total supply current and output voltage swing. The model uses typical parameters given in the "Electrical Specifications" Table beginning on page 3. The AVOL is adjusted for 155dB with the dominate pole at 0.01Hz. The CMRR is set (145dB, fcm = 100Hz). The input stage models the actual device to present an accurate AC representation. The model is configured for ambient temperature of +25C. Figures 56 through 66 show the characterization vs simulation results for the Noise Voltage, Closed Loop Gain vs Frequency, Closed Loop Gain vs RL, Large Signal Step Response, Open Loop Gain Phase and Simulated CMRR vs Frequency.
16
FN6631.2 April 8, 2010
ISL28107, ISL28207
V++ R3 4.45k 4 CASCODE Q4 C4 2pF 2 SUPERB Q1 Q2 R1 5E11 0.1V 25 R17 600 En In+ C6 1.2pF IOS VCM 15pA R2 5E11 IEE 200E-6 9 + VOS 5E-6 V-VCM 1 Mirror Q3 + 7 EOS 8 5 Q5 3 SUPERB DX C5 2pF R4 4.45k CASCODE 6 D1 IEE1 96E-6 V++ 4 5
VIN-
VinV5 24 D12 DN +
+ -
Vc Vmid
+ + -
VIN+
Voltage Noise
V++ G1 4 D2 DX + V1 - 1.86V 11 G3 R5 1 D4 DX + V3 - 1.86V Vg
Input Stage
V++ G5 R7 2.55E10 C2 6.25pF R9 1 L1 1.59E-3 17 R11 1 Vc Vg R12 1 18 L2 1.59E-3 V--
+ -
10
+ -
13
+ -
5 Vc
Vmid
Vmid
G2 + 12 V2 1.86V
R6 1
G4 + 14 V4 1.86V
R8 2.55E10
C3 6.25pF
R10 1
G6
V-VCM
D3 DX
D5 DX
VCM
1ST Gain Stage
2nd Gain Stage
Mid Supply Ref
Common Mode Gain Stage
V++ D8 DX 22 ISY 0.21mA D6 DX 20 23 D9 DX V5 + G7
V+
+ -
V+ + E2
Vg
1.12V D7 DX V6 21 1.12V G8 + -
V-
+ V--
+
E3
V-
D10 DY
+ G9
+ G10
D11 DY
Supply Isolation Stage
FIGURE 54. SPICE SCHEMATIC
Output Stage
17
+ -
+ +
VOUT
+ -
+ -
R15 90 VOUT
R16 90
FN6631.2 April 8, 2010
ISL28107, ISL28207
* source ISL28107_SPICEmodel * Revision A, October 28th 2009 LaFontaine * Model for Noise, supply currents, 145dB f=100Hz CMRR, *155dB f=0.01Hz AOL *Copyright 2009 by Intersil Corporation *Refer to data sheet "LICENSE STATEMENT" Use of *this model indicates your acceptance with the *terms and provisions in the License Statement. * Connections: +input * | -input * | | +Vsupply * | | | -Vsupply * | | | | output * | | | | | .subckt ISL28107subckt Vin+ Vin-V+ V- VOUT * source ISL28127_SPICEMODEL_0_0 * *Voltage Noise E_En IN+ VIN+ 25 0 1 R_R17 25 0 600 D_D12 24 25 DN V_V7 24 0 0.1 * *Input Stage I_IOS IN+ VIN- DC 15e-12 C_C6 IN+ VIN- 1.2E-12 R_R1 VCM VIN- 5e11 R_R2 IN+ VCM 5e11 Q_Q1 2 VIN- 1 SuperB Q_Q2 3 8 1 SuperB Q_Q3 V-- 1 7 Mirror Q_Q4 4 6 2 Cascode Q_Q5 5 6 3 Cascode R_R3 4 V++ 4.45e3 R_R4 5 V++ 4.45e3 C_C4 VIN- 0 2e-12 C_C5 8 0 2e-12 D_D1 6 7 DX I_IEE 1 V-- DC 200e-6 I_IEE1 V++ 6 DC 96e-6 V_VOS 9 IN+ 5e-6 E_EOS 8 9 VC VMID 1 * *1st Gain Stage G_G1 V++ 11 4 5 101.6828e-3 G_G2 V-- 11 4 5 101.6828e-3 R_R5 11 V++ 1 R_R6 V-- 11 1 D_D2 10 V++ DX D_D3 V-- 12 DX V_V1 10 11 1.86 V_V2 11 12 1.86 * *2nd Gain Stage G_G3 V++ VG 11 VMID 2.21e-3 G_G4 V-- VG 11 VMID 2.21e-3 R_R7 VG V++ 2.55e10 R_R8 V-- VG 2.55e10 C_C2 VG V++ 6.25e-10 C_C3 V-- VG 6.25e-10 D_D4 13 V++ DX D_D5 V-- 14 DX V_V3 13 VG 1.86 V_V4 VG 14 1.86 * *Mid supply Ref R_R9 VMID V++ 1 R_R10 V-- VMID 1 I_ISY V+ V- DC 0.21E-3 E_E2 V++ 0 V+ 0 1 E_E3 V-- 0 V- 0 1 * *Common Mode Gain Stage with Zero G_G5 V++ VC VCM VMID 5.62e-8 G_G6 V-- VC VCM VMID 5.62e-8 R_R11 VC 17 1 R_R12 18 VC 1 L_L1 17 V++ 1.59e-3 L_L2 18 V-- 1.59e-3 * *Output Stage with Correction Current Sources G_G7 VOUT V++ V++ VG 1.11e-2 G_G8 V-- VOUT VG V-- 1.11e-2 G_G9 22 V-- VOUT VG 1.11e-2 G_G10 23 V-- VG VOUT 1.11e-2 D_D6 VG 20 DX D_D7 21 VG DX D_D8 V++ 22 DX D_D9 V++ 23 DX D_D10 V-- 22 DY D_D11 V-- 23 DY V_V5 20 VOUT 1.12 V_V6 VOUT 21 1.12 R_R15 VOUT V++ 9E1 R_R16 V-- VOUT 9E1 * .model SuperB npn + is=184E-15 bf=30e3 va=15 ik=70E-3 rb=50 + re=0.065 rc=35 cje=1.5E-12 cjc=2E-12 + kf=0 af=0 .model Cascode npn + is=502E-18 bf=150 va=300 ik=17E-3 rb=140 + re=0.011 rc=900 cje=0.2E-12 cjc=0.16E-12f + kf=0 af=0 .model Mirror pnp + is=4E-15 bf=150 va=50 ik=138E-3 rb=185 + re=0.101 rc=180 cje=1.34E-12 cjc=0.44E-12 + kf=0 af=0 .model DN D(KF=6.69e-9 AF=1) .MODEL DX D(IS=1E-12 Rs=0.1) .MODEL DY D(IS=1E-15 BV=50 Rs=1) .ends ISL28107subckt
FIGURE 55. SPICE NET LIST
18
FN6631.2 April 8, 2010
ISL28107, ISL28207 Characterization vs Simulation Results
1000 INPUT NOISE VOLTAGE (nV/Hz) V+ = 19V AV = 1 INPUT NOISE VOLTAGE (nV/Hz) 10 100 1k 10k 100k 1000
100
100
10 0.1
1
10 100m
1.0
FREQUENCY (Hz)
10 100 1k FREQUENCY (Hz)
10k
100k
FIGURE 56. CHARACTERIZED INPUT NOISE VOLTAGE
FIGURE 57. SIMULATED INPUT NOISE VOLTAGE
70 60 50 40 GAIN (dB) 30 20 10 0 -10 -20 10 AV = 10 Rg = 10k, Rf = 100k AV = 1 AV = 100 AV = 1000 Rg = 100, Rf = 100k Rg = 1k, Rf = 100k V+ = 20V CL = 4pF RL = 10k VOUT = 100mVP-P
70 AV = 1000 60 AV = 100
GAIN (dB)
Rg = 100, Rf = 100k Rg = 1k, Rf = 100k
40 AV = 10 20 Rg = 10k, Rf = 100k AV = 1 Rg = OPEN, Rf = 0
0
Rg = OPEN, Rf = 0 100 1k 10k 100k FREQUENCY (Hz) 1M 10M
-20
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FIGURE 58. CHARACTERIZED CLOSED LOOP GAIN vs FREQUENCY
FIGURE 59. SIMULATED CLOSED LOOP GAIN vs FREQUENCY
1 0 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 -9 V+ = 20V CL = 4pF AV = +1 VOUT = 100mVP-P 1k 10k 100k FREQUENCY (Hz) 1M 10M RL = 100k RL = 10k RL = 1k RL = 499
1 0 RL = 100k -2 RL = 1k RL = 10k -4 V+ = 15V -6 CL = 4pF AV = +1 VOUT = 100mVP-P 10k 100k FREQUENCY (Hz) 1M 10M RL = 499
-8 -9 1k
FIGURE 60. CHARACTERIZED CLOSED LOOP GAIN vs RL
FIGURE 61. SIMULATED CLOSED LOOP GAIN vs RL
19
FN6631.2 April 8, 2010
ISL28107, ISL28207 Characterization vs Simulation Results (Continued)
6 4 LARGE SIGNAL (V) 2 0 -2 -4 -6 -20 0 V+ = 15V CL = 4pF AV = 11 Rf = 10k, Rg = 1k VOUT = 10VP-P RL = 10k RL = 2k 20
LARGE SIGNAL (V)
10 OUTPUT 0 INPUT -10
0
50
100
150
200 250 TIME (s)
300
350
400
50
100
150 TIME (s)
200
250
300
FIGURE 62. CHARACTERIZED LARGE SIGNAL 10V STEP RESPONSE
FIGURE 63. SIMULATED LARGE SIGNAL 10V STEP RESPONSE
200 180 160 140 PHASE 120 100 80 60 40 20 GAIN 0 -20 R = 10k L -40 CL = 10pF -60 SIMULATION -80 -100 0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz)
200 OPEN LOOP GAIN (dB)/PHASE ()
OPEN LOOP GAIN (dB)/PHASE ()
150 PHASE 100
50 RL = 10k CL = 10pF SIMULATION 1
0
GAIN
-50 1m 10m
100 10K FREQUENCY (Hz)
1M
100M
FIGURE 64. SIMULATED OPEN-LOOP GAIN, PHASE vs FREQUENCY
FIGURE 65. SIMULATED OPEN-LOOP GAIN, PHASE vs FREQUENCY
150
CMRR (dB)
100
50 SIMULATION 0 1m
100m
10
1k 100k FREQUENCY (Hz)
10M
100M
FIGURE 66. SIMULATED CMRR vs FREQUENCY
20
FN6631.2 April 8, 2010
ISL28107, ISL28207
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to Web to make sure you have the latest Rev. DATE 3/9/10 REVISION FN6631.2 CHANGE 1. Added MSOP package to the ordering information and added applicable POD M8.118 to end of datasheet 2. Separated each part number with it's own specific -T7 and -T13 suffix. Removed "Add "-T7" or "-T13" suffix for Tape and Reel." from Note 1. 3. Added MSOP to the Pin Configuartion and Pin Descriptions 4. Updated 15 and 5V Electrical Specification table with the following edits: A) Separated VOS specs for SOIC and MSOP packages. Added new VOS specs for MSOP Grade package. B) Separated TCVOS specs for SOIC and MSOP packages. Added new TCVOS specs for MSOP package. 5. Added Theta JA and JC for the 8 Ld MSOP package. Added Theta JC values for both SOIC package options. Changed Theta JA for 8 Ld SOIC (ISL28207) from 115 to 105. 1. Added "Related Literature*(see page 21)" on page 1. 2. Added Evaluation Boards to "Ordering Information" on page 2. 3. "Electrical Specifications" Tables, page 3 to page 6. Unbolded MIN/MAX specs with "TA = -40C to +85C" conditions (since only MIN/MAX specs with "TA = -40C to +125C" conditions should be bolded, per note in common conditions) 4. Corrected Note reference in ISC parameter on page 4 and page 5 from Note 3 to Note 7. FN6631.1 1. 2. 3. 4. 5. 6. 7. Updated VOS, IB, and IOS electrical specifications. Added Typical performance curves, Figures 1 through 30. Output Short Circuit Current test condition has been clarified with Note 7. Updated POD. Added Spice Model, associated text and Figures 56 through 66. Deleted old figures 6, 7, 8, 10, 11 and 12. Added Licence Statement on page 16 and referenced in spice model.
2/22/10
11/10/09
6/5/09
FN6631.0
Initial Release.
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. *For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL28107 and ISL28207. To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php
For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 21
FN6631.2 April 8, 2010
ISL28107, ISL28207
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09
4 4.90 0.10 A DETAIL "A" 0.22 0.03
B
6.0 0.20 3.90 0.10 4 PIN NO.1 ID MARK 5 (0.35) x 45 1.27 0.43 0.076 0.25 M C A B 4 4
SIDE VIEW "B" TOP VIEW
1.75 MAX
1.45 0.1 0.25 0.175 0.075 GAUGE PLANE C SEATING PLANE 0.10 C
SIDE VIEW "A
0.63 0.23
DETAIL "A"
(1.27) (0.60)
NOTES: (1.50) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. Unless otherwise specified, tolerance : Decimal 0.05 Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. 5. 6. The pin #1 identifier may be either a mold or mark feature. Reference to JEDEC MS-012.
2. (5.40) 3. 4.
TYPICAL RECOMMENDED LAND PATTERN
22
FN6631.2 April 8, 2010
ISL28107, ISL28207
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE Rev 3, 3/10
5 3.00.05 A 8 D DETAIL "X"
1.10 MAX
SIDE VIEW 2 4.90.15
0.09 - 0.20
3.00.05 5
PIN# 1 ID 1 2 B 0.65 BSC TOP VIEW
0.95 REF
GAUGE PLANE
0.25
0.55 0.15 H 0.85010 DETAIL "X" C SEATING PLANE 0.25 - 0.036 0.08 M C A-B D SIDE VIEW 1 0.10 0.05 0.10 C
33
(5.80) (4.40) (3.00) NOTES: 1. Dimensions are in millimeters. 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSEY14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. 4. Plastic interlead protrusions of 0.15mm max per side are not included. 5. Dimensions are measured at Datum Plane "H". 6. Dimensions in ( ) are for reference only.
(0.65) (0.40) (1.40)
TYPICAL RECOMMENDED LAND PATTERN
23
FN6631.2 April 8, 2010

▲Up To Search▲

Price & Availability of ISL28107FUZ

	To Download ISL28107FUZ Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .